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SystemVerilog jobs in Germany

7 job openings found.

  • Senior Engineer Digital Concept Engineering

    Infineon Technologies AGPutzbrunn

    • Full Time
    • Senior

    In this role, you will develop digital concepts, conduct safety analyses, design microcontroller architecture, and automate design processes with Python while collaborating closely with various engineering teams.

    • VHDL
    • Python
    • SystemVerilog
    • Cadence
    • Synopsys
    • JIRA
    • +3

  • Design Verification Engineer

    Last Mile SolutionsDresden

    • Hybrid
    • Full Time
    • Senior

    In this role, you develop verification plans, implement test environments for digital and mixed-signal interfaces, perform simulations, and analyze results to ensure the functionality of a multicore system.

    • SystemVerilog
    • RISC-V
    • Perl
    • Python
    • C
    • C++
    • TCL
    • +3
    • +4

  • Digital ASIC Design Engineer

    Last Mile SolutionsDresden

    • Hybrid
    • Full Time
    • Senior

    In this role, you will develop digital ASIC/SoC components from specification through RTL design in Verilog to integration into complex systems, effectively overcoming technical challenges.

    • Verilog
    • Perl
    • SystemVerilog
    • TCL
    • Python
    • +1

  • SoC Architect Mixed-Signal

    Last Mile SolutionsDresden

    • Hybrid
    • Full Time
    • Senior

    In this role, you design the technical SoC architecture, define interfaces between analog, RF, and digital components, and evaluate architectural decisions regarding performance and power consumption.

    • SystemVerilog
    • C
    • MATLAB
    • Simulink
    • SystemC
    • Verilog
    • Python
    • C++
    • +3
    • +5

  • Senior Engineer Digital Concept Engineering

    Infineon Technologies AGMunich

    • Full Time
    • Senior

    In this role, you will define the architecture and specifications for digital concepts, optimize microcontroller architecture, develop automation solutions with Python, and advance functional safety while collaborating closely with cross-functional teams.

    • Synopsys
    • JIRA
    • Cadence
    • Python
    • SystemVerilog
    • VHDL
    • +2

  • Senior Engineer Digital Functional Verification

    Infineon Technologies AGDresden

    • Full Time
    • Senior

    In this role, you will develop verification methods for complex ICs, create test environments using UVM in SystemVerilog, and analyze behaviors employing various verification techniques.

    • VHDL
    • SystemVerilog
    • Cadence

  • Embedded Systems Developer

    Vesterling Consulting GmbHDresden

    • €50k – €70k
    • Hybrid
    • Full Time

    In this role, you design electronic circuits, create PCB layouts, and develop hardware-near firmware and PC-based software in C++. You test, validate, and assist in transitioning products to mass production.

    • FPGA
    • MATLAB
    • Verilog
    • Altium Designer
    • PLECS
    • C++
    • SystemVerilog
    • +3
    • +4

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Missed IT and developer jobs

  • PhD Position - Machine Learning for Circuit Reliability Analysis

    Missed

    IHP Solutions GmbHFrankfurt (Oder)

    • Hybrid
    • Full Time

    In this role, you will develop innovative machine learning methods for analyzing and predicting circuit reliability while collaborating with an interdisciplinary team on fundamental research questions.

    • Verilog
    • PyTorch
    • SystemVerilog
    • Python
    • FPGA
    • +2

  • Principal FPGA Engineer

    Missed

    NXP Semiconductors Germany GmbHGratkorn, Hamburg

    • Hybrid
    • Full Time
    • Senior

    In this role, you define FPGA strategy, develop prototyping platforms, and support critical projects through close collaboration with international teams and professional debugging tools.

    • SystemVerilog
    • VHDL
    • Perl
    • Python
    • TCL
    • Xilinx Vivado
    • Verilog
    • SPI
    • CMake
    • I2C
    • +10
    • +11

  • Solutions Engineering Architect

    Missed

    SynopsysMunich

    • Full Time
    • Senior

    In this role, you design scalable system architectures for innovative solutions, collaborate closely with cross-functional teams and customers, and conduct technical due diligence studies.

    • VHDL
    • SystemVerilog
    • Verilog

  • FPGA Engineer

    Missed

    Leopold AdvisorsHamburg, Siegen

    • Full Time

    You develop and optimize FPGA systems, create test benches and automated tests using Python, and collaborate closely with hardware and software teams on high-performance solutions for real-time control.

    • SystemVerilog
    • FPGA
    • Verilog
    • VHDL
    • Python
    • +2

  • FPGA Engineer - Digital Front End & Real-Time Waveform Generation

    Missed

    Thales GroupDitzingen

    • Hybrid
    • Full Time

    In this position, you develop the digital front-end logic for sensor demonstrators, design and implement real-time waveform generators, and work on high-throughput data acquisition procedures on modern SoC platforms.

    • SystemVerilog
    • VHDL
    • Verilog
    • Embedded Linux

  • FPGA Engineer

    Missed

    planqcGarching bei München

    • Full Time

    In this position, you will develop FPGA-based control and data acquisition systems for quantum computing applications, implement modules in SystemVerilog or VHDL, and collaborate closely with physicists and engineers.

    • ARM
    • SystemVerilog
    • VHDL
    • Python
    • Yocto
    • RISC-V
    • Xilinx Vivado
    • Verilog
    • +3
    • +4

  • Digital Design Engineer

    Missed

    AUMOVIO SE HaupverwaltungFrankfurt

    • Full Time

    In this role, you will design and verify complex digital circuits for FPGA and ASIC, create architecture specifications, and build SystemVerilog testbenches to drive innovation in digital systems.

    • Verilog
    • ARM
    • SystemVerilog
    • RISC-V
    • Python
    • VHDL
    • TCL
    • Perl
    • +5

  • Digital Design Engineer

    Missed

    AUMOVIO SE HaupverwaltungRegensburg

    • Hybrid
    • Full Time

    In this role, you will design complex digital circuits for FPGA and ASIC implementations, develop architectures, and create high-quality HDL modules while collaborating closely with interdisciplinary teams.

    • SystemVerilog
    • Python
    • TCL
    • Verilog
    • VHDL
    • ARM
    • RISC-V
    • Perl
    • +3
    • +5

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Frequently asked questions

Actual salaries may vary, but in our listed SystemVerilog jobs in Germany, the advertised minimum salary is 50.000 euros gross per year, while the highest advertised salary is 70.000 euros gross per year. The average advertised annual salary is 60.000 euros gross.

At the moment, we list 7 open positions for SystemVerilog IT & Developer in Germany on our platform. Check our job offers regularly so you don't miss any new opportunities in this field.

Typical job titles for SystemVerilog jobs in Germany are IT Engineer, IT Architect and Hardware Developer. Requirements and responsibilities may vary depending on the company and specific role, but overall, they offer attractive career opportunities for SystemVerilog IT & Developer in Germany.

For SystemVerilog jobs in Germany, knowledge of technologies such as SystemVerilog, Python, VHDL, Verilog and Cadence is particularly important. By learning these technologies, you can increase your chances of finding a suitable position as a SystemVerilog IT & Developer in Germany.

Leading companies currently offering SystemVerilog jobs in Germany include Last Mile Solutions, Infineon Technologies AG and Vesterling Consulting GmbH. They are looking for talented SystemVerilog IT & Developer in Germany to expand their teams and implement innovative projects.