Digital ASIC Design Engineer

Last Mile Solutions

Job

In this role, you will develop digital ASIC/SoC components from specification through RTL design in Verilog to integration into complex systems, effectively overcoming technical challenges.

Job summary

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Job technologies

Your role in the team

  • Developing digital ASIC/SoC components from specification through RTL design and verification to handoff to synthesis and physical implementation.
  • Implementation of digital functions in Verilog and SystemVerilog, taking into account performance, chip area, power consumption, latency, and timing.
  • Entwicklung von Datenpfaden, Steuerlogik, Zustandsautomaten, Registern, Speichern, Schnittstellen und digitalen Teilsystemen.
  • Translating system and block requirements into clearly structured, robust, and verifiable RTL architectures.
  • Creation and maintenance of design specifications, register definitions, and interface and integration documentation.
  • Defining and coordinating interfaces between digital blocks as well as with analog, RF, and firmware components.
  • Supporting the integration of digital blocks into complex SoC and mixed-signal environments.
  • Close collaboration with SoC architecture, design verification, synthesis & physical implementation, firmware, system engineering, and analog/RF design.
  • Analysis and resolution of design, integration, timing, and verification issues across teams and domains.
  • Support for linting, clock-domain crossing, reset-domain crossing, and formal checks.
  • Support for synthesis, as well as the preparation and handoff of RTL, constraints, and technical documents to Synthesis & Physical Implementation.
  • Supporting the development process from architecture and RTL implementation through tape-out, silicon bring-up, and product release.
  • Erstellung und Pflege von Design-, Integrations- und Verifikationsdokumentationen.
  • Early identification of technical risks, as well as coordination and implementation of appropriate countermeasures.
  • Contributing to the further development of design methods, coding guidelines, review practices, and development processes in a growing deep-tech company.

Our expectations of you

Education

  • A bachelor's or master's degree in electrical engineering, microelectronics, telecommunications engineering, computer science, computer engineering, or a comparable qualification.
  • A structured, analytical, and solution-oriented approach to work, as well as a high degree of personal responsibility.

Qualifications

  • A solid understanding of digital circuit design, synchronous logic, finite-state machines, data paths, registers, memory, and digital interfaces.
  • You can translate technical requirements into clearly structured, robust, and verifiable RTL implementations.
  • Ability to evaluate design decisions regarding performance, area, power consumption, timing, complexity, and robustness.
  • Good written and spoken English skills for working in an international team.

Experience

  • Several years of practical experience in digital design for ASICs, SoCs, FPGAs, or comparable complex embedded systems; typically, you have at least five years of relevant professional experience outside of your studies and internships.
  • Solide praktische Erfahrung im RTL-Design mit Verilog und/oder SystemVerilog.
  • Experience with timing, clocking, reset strategies, and the fundamental requirements for synthesis and physical implementation.
  • Experience with digital interfaces, register definitions, and the integration of hardware/software interfaces.
  • Experience analyzing and resolving RTL, integration, timing, and verification issues.

What we offer

  • Ample creative freedom and genuine ownership instead of micromanagement.
  • Kurzfristige Entscheidungswege und direkter Einfluss auf strategische Entscheidungen.
  • A tangible contribution to the success of our product and company.
  • The opportunity to play a key role in a growing deep-tech company.
  • Contributing to a technology that can transform the future of wireless communication.
  • Flexible work hours with core hours from 10:00 a.m. to 3:00 p.m.
  • Hybrid work with a high degree of flexibility.
  • Modern hardware and professional work equipment.
  • Helle, moderne Büroräume in zentraler Lage in Dresden.
  • Ergonomically designed workstations.
  • An international team with flat hierarchies and short lines of communication.
  • Direkte Interaktion mit Management und technischen Entscheidungsträgern.
  • Kollegen, die sich gegenseitig unterstützen und Wissen teilen.
  • Gemeinsame Mittagspausen und regelmäßige Teamevents.
  • A corporate culture in which initiative and new ideas are actively encouraged.

Benefits

Health, fitness & fun

Topics you will work on

Job locations

Map of the job locations
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  • Location Dresden
    Sachsen, Germany

About your employer

Last Mile Solutions is Europe's leading independent provider of e-mobility platforms and charging infrastructure management. The company connects over 229,000 charging stations directly and manages more than 1.1 million charging cards across 22 countries. The platform offers comprehensive solutions for Charge Point Operators (CPOs) and E-Mobility Service Providers (eMSPs).

Company type
Established Company
Work model
Full Remote, Hybrid, Onsite
Industry
Internet, IT, Telecommunication
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Digital ASIC Design Engineer

Last Mile Solutions