Logo Black Semiconductor

Senior SoC Architect

Job

  • Level
    Senior
  • Job Field
    Embedded
  • Employment Type
    Full Time
  • Contract Type
    Permanent employment
  • Location
    Aachen
  • Working Model
    Onsite
  • Job Summary

    In this role, you will be responsible for developing the EPIC SoC architecture, including digital and high-speed I/O subsystems, integrating all subsystem inputs into a consistent product architecture.

    Job Technologies

    Your role in the team

    • We are seeking a skilled Senior SoC Architect at Black Semiconductor to drive the architecture of our entire Electronics-Photonics IC (EPIC) SoC, translating the Marketing Requirement Document (MRD) into a complete, internally consistent, and implementable Product Requirement Document (PRD) covering digital, analog, I/O, and memory subsystems.
    • You will own the digital and high-speed I/O subsystem architecture directly, with particular depth in high-speed SerDes and the protocol digital logic for UCIe, PCIe, and Ethernet.
    • Working closely with the Analog/RF System Architect, Photonics System Architect, Package Electrical/SI Architect, memory subsystem owner, product management, and engineering teams, you will integrate their subsystem architectures into one coherent overall product architecture.
    • To join our team, you should be excited to own the overall EPIC SoC technical leadership from initial concept through production and drive cross-functional technical alignment across photonics, analog, digital, technology, and product teams.
    • Build and document the overall product architecture, translating the MRD into a complete PRD and ensuring architectural decisions, technical requirements, dependencies, and trade-offs are consistently aligned across teams.
    • Own the digital subsystem architecture, including core logic, on-chip interconnect fabric, and subsystem partitioning.
    • Own the high-speed I/O subsystem architecture, with particular depth in high-speed SerDes and the protocol digital logic for UCIe, PCIe, and Ethernet, including how protocol layers map onto the physical SerDes implementation.
    • Partner with the Analog/RF System Architect, Photonics System Architect, Package Electrical/SI Architect, and memory subsystem owner to integrate their architectures and ensure the full-chip architecture is internally consistent and feasible within the target electrical, physical, and packaging constraints.
    • Drive full-chip performance, power, and area (PPA) trade-off analysis, partner with external vendors/3rd-party IP providers on full-chip validation and characterization teams on product characterization, and make the calls needed to keep the PRD internally consistent.
    • Present the integrated architecture and PRD to product management and engineering leadership and own it through to sign-off.

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    Our expectations of you

    Qualifications

    • Deep, hands-on high-speed I/O subsystem expertise, particularly high-speed SerDes and the protocol digital logic for UCIe, PCIe, and Ethernet, including how protocol requirements shape physical-layer architecture.
    • Strong cross-domain integration skills, with the ability to take analog, photonic, packaging, and memory architecture input from peer subsystem owners and integrate it into one internally consistent PRD without needing to personally own those domains.

    Experience

    • 7-10 years of experience in SoC or product architecture roles, with proven SoC/product architecture ownership and demonstrated experience taking a product from MRD-level requirements through a complete, implementable PRD-level architecture covering multiple subsystems and at least one full product architecture cycle.
    • Strong digital subsystem and interconnect fabric architecture experience, including defining on-chip interconnect and digital subsystem partitioning for a complex SoC.
    • Experience translating marketing/product-level requirements into precise, engineering-actionable architecture specifications and reasoning about full-chip performance, power, and area (PPA) trade-offs.
    • Experience with 3rd-party IP vendors, including evaluating and selecting external IPs and design integration partners.
    • Experience with architecture specification and requirements management tooling for authoring and maintaining the PRD and tracing it back to the MRD; UCIe, PCIe, and Ethernet protocol/standards documentation and compliance tooling; architecture and performance modeling tools, including custom or commercial full-chip performance/power models; Python / C++ for modeling, scripting, and analysis; and collaboration and documentation platforms for coordinating input from analog, photonics, packaging, memory, and other subsystem architects into a single PRD.

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    What we offer

    • We offer a comprehensive benefits package with outstanding insurance, pension, and virtual stock options for your mental, physical, and financial health.

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    Topics You Will Work On

    Job Locations

    • Location Aachen

      Nordrhein-Westfalen

      Germany

    About Your Employer

    Black Semiconductor

    Black Semiconductor

    Black Semiconductor GmbH, based in Aachen, is developing innovative solutions for chip connectivity. The company focuses on integrated photonic and electronic technologies based on graphene. A pilot manufacturing and development infrastructure is being established in Aachen.

    Description

  • Company Type
    Startup
  • Working Model
    Onsite
  • Industry
    Electronics, Automatization
  • Logo Black Semiconductor

    Senior SoC Architect

    Location
    Aachen
    Working Model
    Onsite
    Diversity
    Open for all genders
    English Only
    English only required

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