Job
In this role, you will verify new electronic products by designing and implementing tests using SystemVerilog UVM and SystemC, conducting simulations, and analyzing test results while collaborating closely with the design team.
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Job technologies
Your role in the team
- As an Electronics / Verilog Test Engineer, you are responsible for verifying a completely newly developed product and optimizing the verification environment.
- You are responsible for designing and implementing tests with SystemVerilog UVM and SystemC.
- You also conduct simulations and analyze test and simulation results.
- You will work closely with the design team and assist in commissioning new devices in the laboratory environment.
Our expectations of you
Education
- (Technical) university degree in a relevant technical field or comparable relevant professional experience.
Qualifications
- Knowledge in working with Linux as an operating system and with a scripting language such as Python or Perl.
- Knowledge of common video interfaces such as VDS, HDMI, DSI, CSI, or DisplayPort, as well as data interfaces like PCI and AXI, is advantageous but not mandatory.
- Good German and English skills.
Experience
- At least 3 years of professional experience in digital verification with SystemVerilog or UVM, as well as in the design of tests, test setups, and test plans.
- Experience with SystemC is desirable but not mandatory.
- Ideally, experience in digital design and with object-oriented C++.
Benefits
Health, fitness & fun
Work-Life-Integration
Higher take-home pay
Topics you will work on
Job locations
More about the recruiting agency
Vesterling Consulting GmbH is an experienced recruitment agency specializing in the recruitment of IT and engineering specialists. In addition to recruitment, it also offers tailored training and outplacement services.
- Recruiting Agency
- Full Remote, Hybrid, Onsite
- Consulting
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