Level: Senior

Job Field: Application

Employment Type: Full Time

Contract Type: Permanent employment

Location: Munich

Working Model: Hybrid, Onsite

Job Summary

In this role, you provide customers with support for integrating PCI Express and High Speed SerDes into their ASIC SoCs, conduct technical reviews, and troubleshoot complex integration issues throughout the design flow.

Your role in the team

Providing technical guidance and hands-on support to customers integrating Synopsys Interface IP (PCI Express and High Speed SerDes design) into their ASIC SoC/systems.
Conducting detailed integration reviews at key customer milestones and troubleshooting complex integration challenges throughout the SoC design flow.
Zusammenarbeit mit Kunden bei der Lösung technischer Probleme im Zusammenhang mit RTL-Simulation, Synthese, Floorplanning, Timing-Closure und Silicon/System-Boot.
Supporting silicon bring-up and characterization in system environments, ensuring successful deployment of Synopsys IP in customer products.
Dokumentation bewährter Praktiken, Entwicklung von Anwendungsnotizen und Durchführung von Schulungen, um den Kundenerfolg mit Synopsys-Lösungen zu gewährleisten.
Participating in cross-functional teams to relay customer feedback, contribute to product improvements, and stay current with the latest interface protocols and industry standards.
Gelegentliches Reisen zu Kunden vor Ort für Support, Integrationsreviews und Systemeinführungsaktivitäten.

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Our expectations of you

Qualifications

Solid understanding of ASIC design flows, including simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
Hands-on expertise in integration and validation of High Speed SerDes IPs for PCIe, USB, SATA.
Proficient in RTL and gate-level simulation debugging, with familiarity in front-end tools like Design Compiler, Fusion Compiler, and PrimeTime.
Domain knowledge of PCI Express and SERDES and their implementation flows.
Excellent communicator, able to engage effectively with customers and cross-functional teams.
Organized and detail-oriented, with a track record of meeting tight schedules and managing multiple projects simultaneously.
Resourceful problem-solver who adapts to new challenges and technologies with enthusiasm.
Customer-focused, proactive, and collaborative in approach.
Committed to continuous learning and professional growth.

Experience

Masters with 10+ years of industry experience or equivalent.
At least 10+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered).
Experience with silicon bring-up and system-level characterization in lab environments.

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What we offer

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs.
Our total rewards include both monetary and non-monetary offerings.
Your recruiter will provide more details about the salary range and benefits during the hiring process.

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